I heard one of our Applications Engineers describe our product as “making sandwiches”. It is a pretty good metaphor as it helps visualize a cross section of a printed circuit with several layers of dissimilar materials. Most flexible circuits and PCB’s have multiple conductive layers and are designed to have electrical connection between these layers. The connection through the dielectric layer(s) is most commonly created by a punched, drilled or laser cut hole called a via. This feature is also referred to as a thru hole or plated thru hole (PTH). The integrity of the via is vital for the long range performance of the circuit. There are a multitude of documents that define via requirements and process controls needed to assure reliable connection. IPC 6013 contains a number of definitions and requirements relating to flexible circuit vias.
Via integrity is verified by a destructive micro-section process, where a coupon with vias is cut from the substrate, then the holes are cut in half and potted in an epoxy so the side profile of the plating can be viewed and measured under magnification. Cross sections are generally taken on test coupons located on the border of the panel rather than destroying functional circuits.The via hole diameters on the coupon will duplicate the smallest and largest diameter holes in the circuit. The coupon is normally subjected to prescribed stress testing before examination. The industry standards for the exact location and configuration of the coupons on the panel are defined by IPC 6013 and IPC 2221. For more information on coupons, see our post entitled “Quality Conformance Coupons”
There are a number of attributes that are desired for the ideal via. Figure 1 shows a micro section of a basic via for a double sided circuit. From a reliability/specification standpoint there are three entities of the via that are examined to assess integrity: Pad, knee and side wall.
Bending, twisting and flexing can put a great deal of mechanical stress on the trace and solder in areas near bend or transition points. Additionally, the adhesive system that bonds copper to the dielectric substrate (often acrylic or a modified epoxy) has been formulated to provide different properties vs. the epoxy adhesive system used for the vast majority of rigid printed circuit boards. The epoxy adhesive for a rigid PCB is cast onto reinforcement strands of glass fiber. Curing the epoxy with the glass carrier creates a rigid substrate. In order for a flexible circuit to flex, the adhesive system needs to allow movement. So the adhesive system for a flexible circuit is “softer” and less cohesive than the adhesive system for a PCB. When exposed to the high temperatures of the soldering iron, the adhesive system may soften a bit. In order to compensate for this, the All Flex design guide recommends using “anchor spurs” or tie downs.
Solder is not very flexible and solder joints should not be subjected to the stress of bending. It is a good idea to make sure that flex points are far enough away from the solder pad to prevent stress. Figure 2 shows the issue with a plated via, but the same issue applies to a solder filet. The bend radius guideline using 10X the material thickness is a safe rule for repeated flexing. Flexible circuits are often folded onto themselves in one time bend applications.
Since a flexible circuit can easily conform to surface irregularities, it is important to consider where the solder joint will match up with potential stress points. One example is shown it Figure 3.The end of the stiffener creates a stress point directly under the solder joint. This situation should be avoided.
The pad is an area of copper on the top and bottom that encircle the hole; most specifications require a certain level of pad capture i.e. the copper area surrounding the circumference of the hole. Figure 2 shows the ideal alignment of the via hole to the pad as well as a misaligned hole. The industry term for pad capture is known as annular ring. The minimum annular ring requirement defines the shortest distance between the edge of the via and the edge of the copper pad. A “break out” occurs when no annular ring fully surrounds the hole.
Annular ring requirements vary in IPC 6013 depending on the type of feature. Requirements for external PTHs, internal PTHs, or external unsupported holes are listed in Table 3-11 of this industry standard document. The most common plated thru holes are external, where the requirement is not greater than 180° breakout for Class 1, not greater than 90° breakout visually and .002” encirclement for at least 270° for Class 2, and a minimum of .002” encirclement for Class 3.
There are several criteria related to the plating integrity of the side wall: Average thickness, minimum thickness and voids. IPC 6013 defines criteria for all three. For example a Class 3 circuit requires a minimum average thickness of .001” with the thinnest area being no less than .0007”. IPC 6013 class 1 circuits are allowed to have up to three voids with the total voided area being less than 10% of the wall surface. Class 3 allows for zero voids.
The knee is the transition area from the pad to the wall. While many diagrams depict the knee as a well-defined point, it is actually a radiused area. The knee is an important area to view because many times plating adhesion issues will manifest themselves as cracks at or around the knee. IPC 6013 has much more stringent requirements for the knee area than the wall. For example some small plating voids are allowed in the side wall area for a Class 1 and Class 2 circuits, but zero voids are allowed in the knee area for both of these classes.
Through-Hole vs. Via:
The terms through-hole and via are sometimes used interchangeably, but there are important differences in these terminologies. Figure 3 below depicts the different types of vias. The via labeled “1” in figure 3 is a through-hole. The hole spans across all layers from top to bottom. Drilling is done after all the layers are bonded together. A through-hole is a certain type of via. All through-holes are vias, but not all vias are through-holes.
- The via labeled “2” is called a blind via. A blind via connects two or more inner layers to one of the outer layers. Because there is no visual way to verify the drilling by viewing the exit point, the drilling depth must be precisely controlled based on the thickness of the material.
- The via labeled “3” is called a buried via because inner layers are connected but do not connect to either of the outside layers. The buried via cannot be seen by visual inspection. Buried vias require a separate drilling and plating process for the inner layers before the layers are bonded together.
Blind and buried vias allow greater utilization of the outside layers, as the outer traces do not have to be routed around via openings. Blind and buried vias are typically used when outside layers have high density requirements typical with ball grid array (BGA) component placement.
There are no blind or buried vias with a double sided circuit, so all vias are essentially through-holes. A plated via in a double sided circuit that has a leaded component inserted through it will often have a specific designation as a “through-hole” as opposed to other vias that only provide an electrical connection. For more information on plated- vias and plated through-holes see our previous post on plated through-holes.
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